Designers Corner with Prof. Mike Smith
Part 1
Part 2
Producing documentation
I kept a record of the datasheets, parts, addresses of contacts, key
design issues, bugs, software hints and so on as we went through the XCoNET project. At
IBM we used to keep a big black loose-leaf binder that we called the gotcha
file. Any weird software behavior, hints on how to get Spice to converge (it was called
ASTAP at IBM) would go into the gotcha file, which became a valuable design aide. It was
interesting that IBM would force us to keep our own notebooks, which had to be signed and
witnessed, but not to share information with others in the gotcha book. XCoNET the
website became an electronic gotcha book.
For example, you can see the BOM
(bill of materials, or list of parts) at http://ilima.eng.hawaii.edu/XCoNET/Demonstation_parts.htm#BOM
The schematics for our first
prototype, the Demonstation, are at http://ilima.eng.hawaii.edu/XCoNET/Demonstation.htm
|
The Demonstation, our first prototype; it should have been the
Demonstration board, but we made a spelling mistake on the silkscreen. The FPGA, a Xilinx
Virtex part in an HQ240 package is under the zero-insertion force socket towards the top
right. Ethernet enters via the RJ-45 socket on the upper left. To the left of the socket
is the magnetics and further to the left, the Level One PHY chip. The FPGA is surrounded
by rows of 0.1-inch square headers to allow fixes and changes to be made easily. The two
banks of SRAM are located above right and below left of the FPGA. The play area at the
bottom left of the board allows us to add any chips or other devices to fix problems or to
add functions. The 32-pin socket between the play area and the SRAM is for the PROMJet or
other ROM (that forms the FPGA bootstrap). The Seiko LCD panel at the lower left is used
for debugging. Further to the right is the parallel port. The banana plugs for connections
to the power supplies along with the power regulators are at the upper right edge of the
board. |
We used Sun Circuits, a local Silicon Valley rapid turnaround PCB
fabricator, for the first six prototype boards, (http://www.suncircuits.com/).
There are other similar companies that will fabricate boards in just a few days from
Gerber files (I have used Advanced Circuits for small student projects, for example (http://www.advancedcircuits.com/).
Transfer of the design data to the PCB vendor went smoothly because Steve
Carey, our layout expert, and Bill Pabst had handled many similar design before with Sun.
This experience is worth a tremendous amount (in avoiding lost time and potential errors).
The prototype boards came back within a week. The first thing to do with a new board is
the same as a new chip: measure the resistance between power supplies. In the past, it
used to be wise to Ohm out a new board, measuring the resistance between each
connection and checking it off on the schematic. Modern multilayer boards with surface
mount components are making it more and more difficult to check all the connections on a
PCB. It is still wise, though, to make a few basic checks, especially around the power
supplies. At this point we were reasonably sure we hadnt made any gross errors and
there werent any serious fabrication errors such as missing conductor planes for
example (which sometimes happens).
We were lucky to have a skilled technician at Xilinx, Lito Bonet, who
could assemble the boards for us, including the surface mount components. This is not a
trivial part of prototype assembly. Later, when we were assembling a dozen of our second
prototype boards, we had to put together a kit to send to an outside assembly house. It
was a major effort to make sure all the parts were ready and the assembly of each and
every part was properly documented. Lito was able to figure out what we had forgotten,
find components we had missed, substitute for some parts, correct a few mistakes we had
made, and put everything together with minimum help. Litos skills, which came from
years of experience handling similar projects, saved us weeks of effort.
|
The Demonstation (underneath). The nonvolative Xilinx CPLD is in the
center of the FPGA footprint (four sections of pads each with three rows). The table of
text at the bottom left is on the silkscreen and provides a handy reminder as to the name
and function of each of the 240 FPGA pins. |
Table of Contents
Previous
Next